Huawei envisions a world where technology connects people, empowers industries, and unlocks human potential. Guided by its mission to enrich lives through communication and intelligent innovation, Huawei stands at the forefront of global digital transformation. As a leader in Information and Communications Technology (ICT), the company pioneers breakthroughs in artificial intelligence, cloud computing, and smart devices—building the intelligent foundation of a fully connected world.

Through its Carrier, Enterprise, and Consumer business groups, Huawei delivers resilient digital infrastructure, advanced cloud and AI platforms, and transformative devices that enable progress at every level. Supporting 45 of the world’s top 50 telecom operators and serving one-third of the global population across more than 170 countries, Huawei is shaping a future where connectivity becomes a powerful catalyst for opportunity and sustainable growth.

This spirit of bold innovation is embodied by Huawei Technologies Switzerland AG. From its research hubs in Zurich and Lausanne, pioneering teams push the boundaries of High-Performance Computing, Computer Architecture, Computer Vision, Robotics, Artificial Intelligence, Neuromorphic Computing, Wireless Technologies, and Networking—architecting the intelligent systems that will define tomorrow’s digital era.

For our Computing and AI Systems Research Lab, we are hiring a Hardware Research Engineer to design the cube/matrix/tensor core of tomorrow.

Responsibilities:

- Define the microarchitecture of the next-generation matrix-multiply-accumulate units: data flow, operand re-use, pipelining, accumulation strategy, and utilisation across realistic workloads

- Extend the cube cores primitives to support emerging numerical formats, sparsity, and fundamental algorithms in AI (GEMM, attention, convolution, etc.)

- Communicate and coordinate development at a daily basis with experts at the Huawei Headquarters in China

Requirements:

- A PhD in Electrical/Computer Engineering or equivalent industrial experience

- Several years of designing and optimising high-performance digital hardware: arithmetic units, accelerators, and/or CPU/GPU/NPU/TPU blocks

- Fluency in hardware description language (HDL), e.g., Verilog, VHDL, and the EDA tools and performance-analysis software stack, e.g., Yosys, Verilator, OpenRoad, etc.

- A deep understanding of contemporary and future AI/TPU workloads and an eagerness to extend tensor core primitives to improve performance and versatility

- Excellent written and verbal communication skills with a proven ability to present complex technical information clearly and concisely to a variety of audiences. Collaborative work style with the ability to work in a multicultural environment.


Why join us:
Collaborate with world-class scientists and engineers in an open, curiosity-driven environment;
Access to state-of-the-art technology and tools;
Opportunities for professional growth and development;
Competitive salary, and a high quality of life in Zurich, at the center of Europe;
Last but certainly not least: be part of innovative projects that make a difference.