Huawei's vision is to enrich life through communication. We are a fast growing and leading global information and communications technology solutions provider. With our three business units Carrier, Enterprise and Consumer, we offer network infrastructure, cloud computing solutions and devices such as smartphones and tablet PCs.
Among our customers are 45 of the world's top 50 telecom operators, and one third of the world’s population uses Huawei technologies. Huawei is active in more than 170 countries and has over 180,000 employees of which more than 80,000 are engaged in research and development (R&D). With us you have the opportunity to work in a dynamic, multinational environment with more than 150 nationalities worldwide. We seek and reward talent. At Huawei, if you are dedicated to creativity, engagement of technical risks and delivery of target-driven results, your efforts will be rewarded with outstanding career prospects.
Our Research Center
With 18 sites across Europe and 1500 researchers, Huawei’s European Research Institute (ERI) oversees fundamental and applied technology research, academic research cooperation projects, and strategic technical planning across our network of European R&D facilities. Huawei’s ERI includes the new Zurich Research Center (ZRC), located in Zurich, Switzerland. A major element of ZRC is a new research laboratory focused on fundamental research in the area of future computing systems (new hardware, new software, new algorithms).
The research work of the lab will be carried out not only by Huawei’s internal research staff but also by our academic research partners in universities across Europe. The lab will provide an “open research environment” where academics will be encouraged to visit and work on fundamental long-term research alongside Huawei staff in an environment that, like the best universities and research institutes, is open and conducive to such scientific work.
For this new ZRC Laboratory, we are currently looking for an outstanding Digital VLSI Design Intern. As a key member in our motivated and multicultural team, you will support to design and evaluate novel VLSI architectures for low-power machine learning acceleration.
- Design and Implementation of Digital VLSI HW architecture (RTL) for Machine Learning Acceleration
- Mapping of data, parameters and computations from a ML framework to the HW Accelerator.
- Synthesis and Backend/Layout and gate-level power simulation
- Scientific evaluation and potential publication.
- You are currently enrolled in a Master’s degree or PhD in electrical engineering, compute engineering or computer science, or any related fields at a reputable university; or you graduated within the last six months
- Solid Digital VLSI Design knowledge Front-end and preferably also Back-end (e.g., taught at Universities, like VLSI I-II from ETH Zurich)
- You have worked on a VLSI project and used industry-standard tools like Design Compiler, Innovus, Modelsim or similar.
- Basic knowledge in computer arithmetics.
- Basic knowledge in machine learning is an asset.
- Strong coding and scripting skills (SystemVerilog/VHDL, Python, TCL, Bash etc.)
- Excellent communication and writing skills in English
If you are interested in gaining practical experience while working with the newest technologies and create solutions which enrich people’s life, we are the right company for you. You will be part of a multicultural team and rapidly growing environment - write the future together with us!
Applications need to include a CV and a motivation letter both merged in one document. Please clearly indicate your preferred starting date on your motivation letter.
The starting date for the internship is flexible to the student's availability. The duration of our internships can fluctuate depending on the university regulations and agreements.